Implementation of Iris Recognition System on FPGA

In this study, the research work intends to build a system prototype in a hope achieving a full iris recognition system by using a fast ASIC devices. It contains two important contributions: the first one is implementing the proposed system in software (GUI) with high accuracy rate, robust, less complexity, reliable, and fast technique. In addition, Perform a comparative study and development of recent feature extractor techniques, indicating the best performance approach. Secondly, re- implement the iris system prototype in hardware by using Xilinx FPGA devices. FPGA chips offer an opportunity to speed up iris recognition processing. The system could be used in authentication security in access control and login boards applications.